A current trend in digital equipment is toward the use of increasingly complex integrated circuits whose final behavior is determined by programmable parameters transferred at power-on or system reset. In a state-of-the-art notebook computer for example, the programming parameters of a number of "peripheral" devices are loaded under control of a microprocessor which transfers the information from a non-volatile memory to volatile storage located inside each such device. Typically, the microprocessor transmits the data serially, either supplying a clock signal or accepting a clock signal from the target device. Sometimes separate, simple microprocessors are provided for this purpose.
It has been suggested that a specialized memory, much less complex than a microprocessor could be used instead for this purpose (c.f., XC1736A/XC1765 Serial Configuration PROM, The Programmable Gate Array Data Book, Xilinx Inc., 1991). The specialized memory is preloaded with the parameters for a "target" peripheral device. These parameters are retained in non-volatile storage. At power-on or system reset the specialized memory serially transfers the contents of its non-volatile storage to the programmable peripheral device. The peripheral device is the source of a transfer clock.
The prior art teaches many of the elements needed to create such a specialized memory. U.S. Pat. No. 4,245,302 to Amdahl, for example, teaches a typical instruction fetch-execute organization for a programmable device wherein coded instruction fields are decodable to organize hardware resources for accomplishing a complex task. Mackey et al., U.S. Pat. No. 4,791,384, teach data transfer from a non-volatile PROM to a volatile RAM, and programmed selection of a clock signal from either internal or external sources. Guillot, U.S. Pat. No. 4,882,711, teaches a transfer of data from a non-volatile memory to volatile RAM at power-on, and writing into nonvolatile EEPROM, all accomplished within a single integrated circuit. Fung et al., U.S. Pat. No. 4,899,272, teach the transfer of data from non-volatile memory to volatile configuration registers under program control. The non-volatile memory is implemented using CMOS and battery backup. U.S. Pat. No. 5,021,963, to Brown et al., teaches a transfer of data from a nonvolatile memory to a volatile memory at power-on.
Recently a new class of programmably reconfigurable devices has appeared which are capable of significant changes in behavior based upon which of several setup parameters are loaded. The choice is often dictated by motherboard straps or microswitch settings. Existing specialized memories for loading such devices are limited to programming a single target device, and then only one choice of program.
It is an object of the present invention to provide a class of simple, flexible autoload memory systems which can meet the needs of this new class of programmable devices.